1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a semiconductor memory device with a vertical channel transistor, a body of which is connected to a substrate, and a method of fabricating the same.
2. Description of the Related Art
With the constant demand for ever-higher integration in semiconductor devices, the design rule must be continually decreased. When the design rule decreases, the length and width of the channel region of semiconductor devices also necessarily decrease. As a result, the current driving capability of a device degrades and the active switching characteristic of a device degenerates due to the short channel effect. There has been proposed a vertical channel transistor that has high current driving capability and relatively small leakage current caused by drain induced barrier lowering (DIBL) and punch-through effects. Such a vertical channel transistor has a floating-body type structure. Therefore, in the case of DRAMs based on vertical channel transistor technology, holes created by a gate-induced-drain-leakage (GIDL) current are accumulated in the floating body. The accumulated holes increase the electric potential in the floating body. This causes the abnormal operation of the device, resulting in degradation of the data retention capability of the device.